The present invention relates to a test system for testing a semiconductor device and, more particularly, a test apparatus and method for readily detecting malfunction of the test system.
In general, a semiconductor device fabricating procedure includes a die sort test operation that is performed after wafer level processes are completed. Specifically, an electrical die sort (EDS) test operation for testing electric characteristics may be carried out to test circuit characteristics or reliability of chip dies and to sort and mark good and bad dies. An interconnection unit may be provided which electrically connects test equipment and a wafer. For example, the interconnection unit may be a probe card that is connected to a test head and a wafer so as to apply electrical signals. The test head and the probe card are electrically connected through a pogo pin inserted therebetween.
However, electrical interconnection between the constituent elements such as the test head, the probe card and the pogo pin can become unstable in a test operation. It is preferable to precisely align the constituent elements such as the test head, the probe card and the pogo pin because of the necessity of fine contact with pads of a high-integration chip die. Since tips of the probe card can become degraded due to repetitive contacts, the electrical connection between the tips and a chip die becomes unstable. In addition, the connection between the probe card tips and the pogo pins can malfunction due to minute dust or particles. In particular, probe card tips may be shorted when conductive minute dust is present, or the connection between chip die pads and probe card tips may be opened when non-conductive minute dust is present. Probe card tips and chip die pads may be not connected due to abrasion of probe card tips caused by repetitive contacts. It is difficult to detect problems of the test apparatus during a test operation. Furthermore, it is difficult to detect the positions at which the problems are caused. This causes decrease in the efficiency of the test operation.